Deep Submicron GaN-based Heterostructure Field Effect Transistors with InGaN Channel and InGaN Back-barrier Designs

We developed a double-recess etching process and a new Digital-Oxide-Deposition (DOD) technique to fabricate 180nm low-threshold GaN Metal-OxideSemiconductor Double Heterostructure Field Effect Transistors (MOS-DHFET). Two device layer structures, InGaN channel design and InGaN back-barrier design, were employed to improve the confinement of TwoDimensional Electron Gas (2DEG) and mitigate the short-channel effects. The devices exhibited high draincurrents of 1.3 A/mm and delivered RF powers of 3.1 W/mm at 26 GHz with a 35 V drain bias. A cutoff frequency of about 65 GHz and a maximum oscillation frequency of 94 GHz have been achieved. The subthreshold swing and the Drain Induced Barrier Lowering (DIBL) in those devices are less than 75 mV/decade and 80 mV/V, respectively. To further improve the confinement of 2DEG, we combined and optimized the InGaN channel design with the InGaN back-barrier design. We also developed a selective doping technique to reduce the high electrical field around the recessed gate and improve the electric field profile in the ungated drift region for supporting high voltage. In addition, the selective doping technique also leads to the reduction of parasitic drain and source resistance in deep-submicron GaN Heterostructure Field Effect Transistors (HFETs) and consequently improves the device RF characteristics.